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Developing
laser field programmable analog arrays (LFPAAs)
and gate arrays (LFPGAs)
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While interest, availability and use of Field Programmable
Analog Arrays (FPAAs) have grown, FPAAs still have not
achieved the same success as FPGAs in the digital domain.
This results from several factors, including the lack
of CAD tools, small analog circuit density, small bandwidth/low
circuit speed and layout dependent noise figures. These
factors are all related to each other, making the design
of a high performance FPAA a multi-dimensional problem.
A critical reason behind these difficulties is the non-ideal
programming technology, which contributes a large portion
of parasitics into the sensitive analog system. Because
of its extremely low resistance, negligible parasitic
capacitance and full compatibility with commercial CMOS
process, MakeLink can fully reduce these FPAA design concerns
and offer a breakthrough capability in analog array performance.
Our
Laser ASIC group has developed an efficient FPAA architecture,
an FPAA router, a novel amplifier core and a mature programming
technology (i.e., laser MakeLink). Currently we are conducting
research on the implementation and applications of a high
speed, radiation
hard Laser Field Programmable Analog Array (LFPAA)
using
LaserLink's MakeLink technology.
The
first lot of LFPAA test chips have bee fabricated on Peregrine's
0.5um FC process. This LFPAA chip consists of a 4 x 2
array of Configurable Analog Blocks (CABs) surrounded
by abundant interconnect resources. There are 12 PAD groups
around the chip, and 8 tracks per X/Y channel. Each CAB
has 4 input and 4 output pins with internal circuit operating
in fully differential mode. With appropriate programming,
the LFPAA can provide an accurate, low-cost and rapid-prototyping
analog ASIC solution. Now we are performing chip characterizations.
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Related
links: Laser
MakeLink Programing Technology ; LFPGA ; LFPAA
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People:
Ji Luo
Hu
Huang
Kenny
Chung
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Ultra-thin silicon gate oxide reliability in collaboration
with the National Institutes of Standards and Technology
(NIST)
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Description:The
focus area investigates the physics of failure and the
reliability testing techniques for ultra-thin SiO2 and
high dielectric constant gate dielectrics. The physical
mechanism responsible for "soft" or "quasi"
breakdown modes in ultra-thin SiO2 and high-k films and
its implications for device reliability will be investigated
as a function of test conditions and temperature. Long-term
time-dependent-dielectric breakdown (TDDB) tests will
be conducted on SiO2 films and high-k dielectrics with
equivalent oxide thickness (EOT) as thin as 1.5 nm at
electric fields close to operating conditions. These tests
will be used to determine the thermal and electrical acceleration
parameters of device breakdown.
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| Related
links: http://www.eeel.nist.gov/812/43.htm |
| People:
Baozhong Zhu
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Power
electronic silicon, SiC and GaAs device reliability sponsored
by the Office of Naval Research as part of the PEBB program
(ONR
project) |
Description:
ROBUST DESIGN OF WIDE BANDGAP POWER DEVICES
Technical Objectives: This
program was started in May, 2000 to study fundamental
properties of silicon carbide (SiC) as applicable to high
power switching devices. In theory, SiC should perform
greater than 10 times more effectively as a power device
material as compared to Silicon, however in practice,
the improvement has not completely met expectations. Our
research objective is thus to determine the device characteristics
of real devices and model the SiC material system and
incorporate bulk defects in order to better understand
the output characteristics of SiC power devices.
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| People:
Xiaohu Zhang
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Aerospace
Vehicle Systems Institute (AVSI) |
AVSI#17:
Methods to Account for Accelerated Semiconductor Device
Wear out
This program is to develop methods to evaluate mechanisms
and accommodate the effects of accelerated semiconductor
device wear out on avionics system design, production
and support. This also includes developing methods to
account for shorter device lifetimes in avionics system
safety and reliability analysis.
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| Related
links: http://avsi-tees.tamu.edu/index.html
; AVSI |
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People:
Xiaojun Li Bing
Huang Yan Liu Jin
Qin
Xiaohu Zhang
Visiting
Scientists: Michael
Talmor ; Zvi
Gur
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