The patented technology involves creating hard-wired metallic connections between standard levels of metalization used in semiconductor processing. It has tremendous competitive advantage over metal wire cutting for several reasons: 

• Lower Cost : Completely compatible with standard CMOS processing with NO additional steps, masks, or other costs. 
• Higher Density : 2 to 4 times the number of connections per square micron than the best break-link technology. Even greater density is achieved because the make-link is formed ON TOP of active silicon. 
• Higher Yield : The make link technology is 100 to 1000 times more reliable to implement than a comparable break link design at the same metal pitch. 
• Hermetic : The link is completely encapsulated by the passivation layers and metal is never exposed to the environment. The links are also completely non-volatile and radiation hard. 
• Additive : Unlike deletive techniques, additive connections can reduce the number of required operations to implement logic circuits, also, the links can be made arbitrarily large by placing many in parallel to handle unlimited current with no resistance. 
• High Speed Programming : The laser systems used to program the chips create connections at a rate of around 20,000 per second. This is much faster than any electrical programming technique for wafer level programmability.